CS251 - Computer Organization and Design - Spring 2008

Lecture 5 - State - flip-flops


Practical Details

  1. Exercises in the book: B.1 to B.17, B.35 to B.44.

Back to Gates

Multiple gates on a chip is the level of technology we call medium scale integration, MSI.

Here is the sort of thing you could buy in that era

Decoder/Encoder

Example: 2 to 4 decoder.

Where are decoders used

  1. Buses: read/write line
  2. Bus arbitration
  3. DRAM decoding

Multiplexor/Demultiplexor

Example: 2 to 1 multiplexor

Where are multiplexors used

  1. Driving a bus, together with 3-state outputs
  2. Inserting sprites in video games
  3. USARTs

Drawing a bus with a slash

General Logic

ROM

PLA


State

SR Flip-flop

Two inputs

  1. S: Set
  2. R: Reset

Output Q

Truth table

S R P Q
F F T F
    F T
T F F T
F T T F

On S: F -> T sets Q to T, P to F

On T: F -> T resets Q to F, P to T

In other words, by asserting S or R you put the SR flip-flop into a state in which it remains until next set or reset. That is, it remembers what happened most recently to it.

D Latch

Two inputs:

  1. D: Data
  2. C: Clock

Output: Q

Clock high: output follows input

Clock low: output stays constant

The latch samples the input on the high to low clock transition, then holds it

Where might you use a latch?

Do the exercises on pp. 13-14 of the notes.

D Flip-flop


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