CS251 - Computer Organization and Design - Spring 2008

Lecture 8 - State - flip-flops

Practical Details

  1. Assignment 1.


D Flip-flop

Two D-latches in a master-slave configuration.


Arrays of D flip-flops all clocked by the same clock.

Register file

Just a collection of registers

Read-write logic

Three-state Outputs

A bus, by definition, can be driven by more than one source. How can this be done?

Example: SRAM

Two bits of address, two bits of data.

SRAM is used for cache memory because it is


Error in the notes. Page 18, bottom, should read.

DRAM Refresh

  1. Charge slowly drains away, weakening the signal.
  2. Read, which weakens state further
  3. Rewrite, which makes it new again.

Typical to refresh once every few milliseconds

Error in notes. Page 19, line starting `If capacitors ...' should read


The first `S' stands for synchronized.

Controllers Based on Finite State Machines.

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