CS251 - Computer Organization and Design - Spring 2008

Lecture 27 - Pipelining


Practical Details

  1. Assignment 6

Exceptions

The Basic Idea

Sometimes, we hope not too often, something unusual happens

  1. internal: fault in instruction execution
  2. external: something needs to be done

Once upon a time:

68000 supposed they were the same thing

On an exception a complex collection of software operations occurs

  1. State of runing task is saved
  2. OS runs code to handle exception
  3. Normal operation is resumed

What does the processor do? a pseudoinstruction or a complex instruction

Concrete example


Pipelining

We made each instruction into a sequence of phases

  1. instruction fetch, uses
  2. instruction decode and operand generation, uses
  3. execute: split across instruction type

    uses

  4. memory access: M-type only, uses
  5. writeback to register: R-type, M-type, uses

For good pipelining

Make all phases of instruction execution the same length

  1. One instruction length
  2. Few instruction formats
  3. Restricted memory access

Comparison

Single-cycle Multi-cycle Pipelined
Instruction types 3 3 3
Instruction lengths 1 slow cycle 3,4,5 fast cycles 5 fast cycles
Instruction issue 1 per cycle 1 per weighted average 1 per cycle
ALUs 2 slow, 1 fast 1 fast 3 fast
Memories 2 1 2

Hazards

Any condition that blocks the flow of instruction through the pipeline

Structural

Hardware prevents two phases from overlapping

Control

Don't know PC in time for next instruction fetch

Data

Result of one instruction needed in the next one.


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