CS452 - Real-Time Programming - Fall 2008

Lecture 4 - ISRs


Questions & Comments

  1. Due dates for kernel

Interrupt Service Routines (ISRs)

We can use interrupts to get rid of polling

Interrupts are exceptions

  1. Mask interrupts
  2. Set link register
  3. Save CSR
  4. Transfer control

ISRs

Like function calls without arguments or return values.

  1. Save state of interrupted task
  2. Turn off source of interrupt
  3. Do the work
  4. Restore state of interrupted task
  5. Return to next instruction of interrupted task

Implementation of polling loop

  1. With interrupts disabled
    1. set up data structures for processor to find ISRs
  2. Enable interrupts
  3. FOREVER { }

Worst case reponse time

ISR implementation of polling loop

  1. Interrupt occurs indicating that condition is true
  2. Wait for interrupts to be enabled
  3. Wait for current instruction to finish
  4. Processor finds ISR and starts executing it
  5. ISR
    1. saves enough state
    2. gets volatile data
    3. removes source of interrupt
    4. executes the action
    5. restores state
    6. exits, which re-enables interrupts

Worst case response time

Improvements

  1. Multiple calls from the same interrupt you get for free
  2. Can open windows in long-running actions by enabling interrupts

A process, having, for example, executed getch( ), is blocked waiting for input

  1. Interrupt occurs at the same time that the ready bit sets.
  2. Wait for interrupts to be enabled
  3. Wait for current instruction to finish.
  4. Processor finds start of ISR and starts executing.
  5. ISR
    1. saves enough state
    2. gets volatile data
    3. removes source of interrupt
    4. restores state
    5. exits
  6. Interrupted process continues running
  7. Time slice interrupt transfers control to OS
  8. OS
    1. notices that data is ready
    2. puts it into process
    3. marks process ready
    4. schedules
    5. exits
  9. When process is scheduled, maybe not the first time after the interrupt, it
    1. returns from getch( ),
    2. executes first instruction processing the data.

Worst case response time?

Interrupt vectors

Hardware method for processor to find ISRs

Method 1

  1. Interrupt source is uniquely identified at the processor
  2. Processor has one magic location per interrupt
  3. Hardware puts beginning of ISR into PC

Method 2 (Intel)

  1. One interrupt line on the processor
  2. Processor reads register(s) in ICU to find out which interrupt occurred
  3. Data structure in main memory

    contains beginning of ISR

  4. Hardware runs all these bus cycles, then


Kernel of a Real-time Operating System

Diagram

What Does the Kernel Provide

Tasks

Communication

Communication has two sides

  1. sharing information
  2. handshaking

We use Send/Receive/Reply (SRR) to do both.

  1. Send blocks
  2. Receive blocks: is synchronous with the call to send
  3. Reply doesn't block: is synchronous with the return from send

Diagram

Synchronization

  1. Between tasks
  2. With internal events
  3. With external events


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