CS452 - Real-Time Programming - Fall 2009

Lecture 13 - ARM Interrupts



Three ordinary timers

Two special timers

Interrupt Hardware

Two types of interrupt hardware

  1. Edge-triggered
  2. Level triggered

How to turn an edge into a level

The ARM Interrupt Controller

How OSs Handle Interrupts

  1. ISRs that do all the work
  2. ISRs that work asynchronously
  3. ISRs that trigger other processes

Interrupt Handling Methods

Monolithic ISRs Signals Task chains Comments
Non-nested Yes Yes No: User tasks interruptable Better not be very much to do
Nested Not usually No. Trying to do minimal work Yes: prioritized within task structure Not very useful without priorities elsewhere
Prioritized Nested When there is too much to do. No. Trying to do minimal work Interruptable kernel, OR free with prioritized tasks Hard to get right
Prioritized: software No No Yes
Prioritized: hardware Yes, if processing is long Yes, for simultaneous interrupts Yes, for simultaneous interrupts
Vectored, with priority Yes, for speed Yes, for speed Not usually worth it This cuts out polling of the interrupt controller and the devices.

Registers: General

ARM Specific

Two controllers, daisy-chained

Registers at

47 registers per controller


  1. FIQ-configured interrupts (not vectored)
  2. IRQ-configured vecored interrupts
  3. IRQ-configured non-vectored interrupts

Useful Tricks

Software Interrupt

Making programming easier

  1. SWI,
  2. VICxSoftInt & VICxSoftIntClear

HALT versus Idle Task

What do you do when there are no tasks to run?


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