Three ordinary timers
Two special timers
Two types of interrupt hardware
How to turn an edge into a level
Monolithic ISRs | Signals | Task chains | Comments | |
Non-nested | Yes | Yes | No: User tasks interruptable | Better not be very much to do |
Nested | Not usually | No. Trying to do minimal work | Yes: prioritized within task structure | Not very useful without priorities elsewhere |
Prioritized Nested | When there is too much to do. | No. Trying to do minimal work | Interruptable kernel, OR free with prioritized tasks | Hard to get right |
Prioritized: software | No | No | Yes | |
Prioritized: hardware | Yes, if processing is long | Yes, for simultaneous interrupts | Yes, for simultaneous interrupts | |
Vectored, with priority | Yes, for speed | Yes, for speed | Not usually worth it | This cuts out polling of the interrupt controller and the devices. |
Two controllers, daisy-chained
Registers at
47 registers per controller
Priority
Making programming easier
What do you do when there are no tasks to run?
HALT
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