CS452 - Real-Time Programming - Fall 2011

Lecture 3 - Hardware

Pubilc Service Annoucements

  1. Due date for assignment 0
  2. `I can remember amusing myself once as an undergraduate, deleting and creating files till I got the right inode numbers to allow a judicious choice of binary file names to result in a directory that was a valid executable a.out image,' says Digby Tarvin. Anybody interested in trying this for elf?
  3. Copying code.
  4. Screens in the laptop area
  5. Stack: where is it?
  6. Bug in the bwio library

Choosing a Partner

What we do

What we expect you to do

The Hardware

Three suppliers

The hardware used in the course depends mainly on three suppliers

  1. ARM: design firm that provides the architecture plus either wire-list or masks
  2. Cirrus: chip manufacturer that integrates other elements with CPU to create the SoC, which contains
  3. Technologic: system manufacturer, who creates a circuit board, supplies memory (DRAM & flash RAM), puts connectors on a box, and puts the circuit board into the box.


`COM' ports

Connected to UARTs

Only really two

Ethernet port

IP number of the box is static, part of the configuration maintained in Flash memory.

Reset switch

Documentation says the switch is black, but on some boxes it's red.


Byte addressable, word size 32 bits


In Flash RAM


System on chip

System busses

Advanced high-speed bus (AHB)

AHB connects

Advanced peripheral bus (APB)

ARM 920T with v4 Instruction Set

The Software


GNU tool chain


Partial implementation

Returns when program terminates

Busy-wait IO

COM2 uses monitor; COM1 goes to train

  1. initialization/configuration
  2. output
  3. input

For assignment 0 you need to increase the functionality.

Bug in one function

Data Communication using RS-232

Communication protocol existing since forever.

Configuring RS-232

If you looked at the voltage on a transmit or receive wire doing RS-232 you would see, in order,

  1. start bits for synchronization (1 or 2)
  2. data bits (6, 7 or 8)
  3. possibly a parity bit
  4. stop bits

all coming at a specific rate, measured in bits per second. So you need to configure

  1. transmit/receive speed
  2. how many start bits
  3. how many data bits
  4. whether or not there's a parity bit, and whether the parity is even or odd
  5. how many stop bits

and the configuration must match the other end or communication is impossible.


Most UARTs have an error register that you can read, which has bits for different types of errors

  1. OVERRUN: you have missed a byte
  2. FRAMING: the UART did not get valid start and stop bits
  3. PARITY: obvious
  4. BREAK: implementation-dependent

Very simple RS-232

Three wires

Wired like this

GND ---------- GND

XMIT --\ /---- XMIT
RCV----/ \---- RCV

Flow Control in RS-232

Three wire works fine as long as both ends of the wire are much faster than the wire itself. But the train controller is very slow. Why?

The train controller needs to be able to say STOP, I can't take any more

Software Flow Control


Hardware Flow Control


What Happens if You Omit Flow Control

What Students are Doing Wrong

Most students who have talked to me have a polling loop that loops something like this

while ( 1 )
    read timer
    if ( timer has counted enough )
       rewrite the time using bw... to terminal;
    if ( terminal READY bit set )
       read byte
       if ( byte == EOL )
           parse command in buffer
           execute command // including bw... to train and bw... to terminal
           accumulate byte in buffer;
    if ( train READY bit set )
        read byte
        accumulate byte in buffer
        if ( buffer has complete command )
           parse command in buffer
           execute command // including bw... to train and bw... to terminal

This code operates correctly some of the time, but not all the time. To see why,

  1. construct a worst case, asking yourself how often each of the events might occur;
  2. calculate the worst case time for all actions to execute, including the waiting

Obviously, the polling loop needs to be quite a bit more complex.

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