CS452 - Real-Time Programming - Spring 2008

Lecture 9 - Kernel Code


Questions & Comments

  1. Hand back the first assignment, with comments.
  2. Trains lab

Hardware Facts for Eos

Memory Map

Devices

Accessed by special I/O instructions


Architecture of X86

General Purpose Registers

All these registers have special names for the low 16 bits. (drop the E), and for the low 8 bits (add an L), and for the second 8 bits (add an H)

Addressing Memory

Physical address is

Helps to provide

  1. position independent (relocatable) code
  2. memory protection

Six segment registers

  1. CS
  2. DS
  3. ES
  4. FS
  5. GS
  6. SS

Each segment register is an index into a Global Descriptor Table (GDT), which contains

  1. low limit
  2. high limit
  3. etc.

Index is actually contents of register >> 3.

Setting up a Task

Every task requires at least two GDTs

The compiler assumes that DS = SS

Set DS = ES = FS = GS = SS for each task

There is no GDT in place when the kernel boots

How is this done

  1. The address of the table is kept in the special register GDTR
  2. lgdt sets GDTR; sgdt reads GDTR

Yet another register EFLAGS contains processor state such as

Setting up a tas

Context Switch in the 386

int <vector>

iretl

Task to kernel

  1. int <vector> in task
  2. pushal saves all the active task's registers on the active task's stack
  3. switch to kernel stack
    1. you got CS, EIP from IDT
    2. ESP from your magic place
    3. DS from the kernel variables
  4. restore remainder of kernel state from stack

Kernel to task

  1. save kernel state on kernel stack
  2. switch to active task's stack
  3. restore general purpose registers: popal
  4. iretl gets EFLAGS, CS, EIP from the task stack.

To get a task going

  1. Set up its stack so that it's all ready to run its first instruction
  2. Schedule
  3. Kernel to task

For the first user task there is only one possibility for active.


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