CS452 - Real-Time Programming - Spring 2009

Lecture 13 - Interrupts

Practical Detail



Interrupt input (hardware) asserted

First instruction of interrupt handler put into pipeline

  1. Change processor mode to int
  2. Put next instruction address of interrupted task into lr_irq
  3. Put CPSR of interrupted task into spsr_irq
  4. New CPSR has interrupts disabled, mode changed
  5. Set pc to 0x18

Similar procedure for fast interrupt

  1. Extra duplicated registers: r8-r14
  2. Mode is fiq
  3. pc is set to 0x1c
  4. FIQ has higher priority

Many sources for interrupts

  1. How do you find out which one has been asserted?
  2. How do turn off the interrupt?

    And in what order?

ARM Specific

Two controllers, nested

Registers at

47 registers per controller


  1. FIQ-configured interrupts (not vectored)
  2. IRQ-configured vecored interrupts
  3. IRQ-configured non-vectored interrupts

Low-level primitive

This is what everything depends on

int AwaitEvent( int EventType );

What does it do?

  1. Blocks on an interrupt of the type specified
  2. When the interrupt occurs, may return one word of volatile data

Implementation notes

  1. Event may already have occurred
  2. AwaitEvent( ) can service the device.
  3. Need to think of priorities when you partition the work
  4. Kernel has interrupts turned off

How is it used?

Example: Clock Server

Provides a sleep prinitive

int Delay( int interval )

What does the kernel do?



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