-
Jumpers to set configuration
-
UART3 implemented by PLA.
TS-7200 is set up for internal pre-boot with source from read-only
memory (ROM) on the 32-bit AHB.
The AHB bus has all the important high-speed components
- memory (program and graphics)
- ethernet controller
- USB controller, and
- 16Kbytes of mask-programmed ROM at
0x80090000
Initial state
ARM
The following things, which are contolled through the system control
co-processor, are determined by the CPU architecture. They must be
independent of the stuff added by Cirrus
- MMU flat, but might be different on soft reset
- Caches disabled
- Slow bus clock
- Interrupts disabled
- Little-endian memory system
- No access to MMU registers
- Normal exception registers
Cirrus
The following things, which are described in the EP9302 documentation, are
properties of hardware Cirrus added. They are independent of how Technologic
configured the chip when they designed the TS7200.
- DRAM controller(s) not initialized
- Flash controller(s) not initialized
- All I/O devices in reset state. (They receive hardware reset inputs
from the CPU.)
- Memory map in boot mode
Technologic
The following things, which are described in the Technologic
documentation, manual & circuit diagram, are properties of the TS7200
- Boot control bits, set to normal boot, 32-bit bus width, sychronous
boot device, internal, watchdog timer disabled.
- Physical memory map
- 0x80000000 to 0x800fffff, used by Cirrus for on-chip components
- TS7200 uses 4-bit chip select to divide the memoery into 256 Mbyte
blocks
- 0x00000000 to 0x0fffffff (first 256M) SDRAM, CS0, 32 bus
cycles
- 0x10000000 to 0x1fffffff: CS1, 8 bit bus cycles
- 0x20000000 to 0x2fffffff: CS2, 16 bit bus cycles.
- 0x60000000 to 0x7fffffff: CS6/7, Flash
- 0x80000000 to 0x8fffffff: I/O registers including
- 0x80000000 to 0x807fffff: AHB mapped registers, including
- DMA
- Ethernet
- USB
- Memory controllers
- Pre-pre-boot ROM
- ICU registers
- 0x80800000 to 0x8fffffff: I/O registers
-
SDRAM chips break memory into 4M blocks. Addresses of 4M blocks
are:
0x00000000
to 0x003fffff
0x00400000
to 0x007fffff
0x00800000
to 0x00bfffff
0x00c00000
to 0x00ffffff
0x01000000
to 0x013fffff
- ...
With 32Mb model of the system each of these blocks is only
half-populated.
- In the AHB registers is a 16K block of ROM from
0x80090000
to 0x80093fff
- Initially, it is mapped to the entire memory space at 16K
intervals.
- Chip select, and how addressing occurs.
- Chip select of this block is
0x8009[00XXb]XXX
- Chip select has two parts
- I/O chip select:
0x8XXXXXXX
- AHB chip select:
0xY00XXXXX
- ROM chip select:
0xYYY9[00XXb]XXX
- The first instruction executed is the one that you find at
0x80090000
Pre-pre-boot Sequence
- Jump to
0x80090018.
-
Remap memory.
-
Turn on red LED; turn off green LED
- Make the CPU completely vanilla. E.g.,
- no caches, physical memory map,
- Turn off watchdog timer
- Acquire boot state
-
Configure the clocks to run from external source (needed for serial boot)
- Acquire boot state configuration inputs
- These are input pins on the EP9302, the state of which is
determined by the TS7200.
- A couple are user-controllable via jumpers
- They are the only thing the EP9302 knows about the outside
world
-
Using the memory width given in the boot state register
-
Initialize Flash and SDRAM memory controllers for slowest
possible access.
-
But we still don't know if Flash or SDRAM memory are part of the
system.
-
Toggle LEDs
-
Switch on the boot state configuartion inputs.
-
Serial boot on UART1
-
Initialize UART1
-
Output ">"
-
Check for SURC or CRUS in first four bytes
-
Read 2048 bytes from UART1 to the ethernet buffer
-
Output "<" to ACK bytes
Turn on green LED
-
Jump to the start of the ethernet buffer and start the pre-boot.
-
If no input came in at step 3 then jump to an infinite loop in
the ROM that blinks the green LED forever.
-
Boot from ROM outside SoC
- Assert ROM chip selects looking for CRUS
- When found read 2048 bytes from the ROM to ethernet buffer
- Jump to the start of the ethernet buffer
-
Boot from flash
-
Look for SURC or CRUS at possible flash start locations
(ten in all)
-
When found jump to start location plus
0x4 (account
for CRUS)
-
If not found
-
load infinite loop into ethernet buffer
-
jump to the code
-
flash green LED forever
This code, provided by Technologic, knows all about the EP9302,
and all about the TS7200. This code was written using the function
mechanism provides by GCC and shows signs of having been optimized.