Multiple gates on a chip is the level of technology we call medium scale integration, MSI.
Here is the sort of thing you could buy in that era
Example: 2 to 4 decoder.
Where are decoders used
Example: 2 to 1 multiplexor
Where are multiplexors used
Two inputs
Output Q
S R P Q
F F T F
F T
T F F T
F T T F
On S: F -> T sets Q to T, P to F
On T: F -> T resets Q to F, P to T
In other words, by asserting S or R you put the SR flip-flop into a state in which it remains until next set or reset. That is, it remembers what happened most recently to it.
Two inputs:
Output: Q
Clock high: output follows input
Clock low: output stays constant
The latch samples the input on the high to low clock transition, then holds it
Where might you use a latch?
Do the exercises on pp. 13-14 of the notes.
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