CS251 - Computer Organization and Design - Spring 2008
Lecture 14 - Putting It Together
Practical Details
- Assignment 3, question 2
- Read 5.1 to 5.4, C.2
Floating Point Numbers
Representation
Sign, exponent, significand (mantissa)
- 1 bit for sign
- 8 bits for exponent (7 bit bias in representation)
- 23 bits for significand
- the fractional part of a binary number between 1 and 2:
1.xxxxxxxxxxxx (23 x's)
- Store only the x's
- This is what it means for the significand to be normalized.
- bias is 127
Value is sign * (1 + significand) * 2^(exponent - bias)
Distribution
Clustering matters in practice
- smallest significant: ss = 1
- largest significand: ls = 2 - 2^(23)
Exponent | smallest | largest | delta
================================================
bias | -2 | 2 | 2^(-23)
0 | -2^(-127) | 2^(-127) | 2^(-151)
256 | -2^(129) | 2^(129) | 2^(105)
================================================
Exercises for the reader:
- Check the values in this table.
- Plot on a number line all 13 values for a 2-bit exponent and a 2-bit
significand
Double Precision
64 bit number
- 1 bit for sign
- 11 bits for exponent
- 52 bits for significand
And there is even extended precision
What goes wrong
- Addition
- Multiplication/division
Importance of NaN.
Where are these problems observed?
- Computer graphics
- Statistics
Algorithms for Addition and Multiplication
Addition/Subtraction
- Equalize exponents
- Shift right significand of number with smaller exponent
- Add 1 to its exponent
- Until exponents are equal
- Add/subtract significands
- Put one bit bit 23
- Use sign bit top create TCIs
- Sign extend
- Add as TCIs: extra precision not needed
- Normalize result
- Shift significand left or right
- Add 1 to or subtract 1 from exponent
- Until significand is normalized
Multiplication (Division)
- Add (subtract) exponents
- Multiply significands
- Normalize result
Pathologies
Exponent can overflow or underflow.
Significand can underflow
NaN (Not a Number)
Possible values
- Too large to represent
- Too small to represent
- Infinity
- Underflow
Single-Cycle Processor
Datapath & control for a mini-MIPS (MIPS = Multiprocessor without
Interlocked Pipeline Stages). Operations
- load and store
- add, subtract, AND, OR, set on less than
- jump and conditional branch
which is enough to write just about any program.
Exercise: What is missing? (Answer. Shift)
MIPS Architecture
32 32-bit registers, numbered 0 to 31
Memory of 32-bit words
- byte addressable
- address of word is address of most significant byte
- data paths are 32-bit
All instructions are 32-bit
Instructions
Load & store
- addressing modes
- register, $s1
- base + displacement, 100($s1)
- immediate, 100
- load:
lw $s1, 100($s2) - load into register 1 whatever is
100 bytes from the value in register 2
- store:
sw $s1, 100($s2) - store the contents of register 1
into the memory at 100 bytes from the value in register 2
Add, subtract, AND, OR, set
- add:
add $s1, $s2, $s3 - add the values in regusters 2 and
3 and put the result in register 1
Conditional branch
- branch on equal:
beq $s0, $s1, 10 - is the value in
register 0 equals the value in register 1 set PC <= PC + 4 + 40
Unconditional branch
- jump:
j 1000 - PC <= 4000
MIPS Functional Units
- Program counter (PC) used to fetch instruction from instruction
memory
- Instruction used to fetch register operands from register file
- Instruction plus registers used to fetch memory operands from data
memory
- ALU computes result
- Result put into register file or data memory
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