CS251 - Computer Organization and Design - Spring 2008

Lecture 23 - Multiple Cycle Designs

Practical Details

Optional assignment
Read 5.5, C.3, C.4

Multicycle Execution

The Basic Idea

Datapaths and Registers

PC(reg) to memory to Instruction(reg)
- PC to ALU to PC
Instruction(reg) to
- register file to operands(reg)
  ALU (immediate part) to ALUout(register): second cycle (load & store instructions)
  
  sign extend & shift to ALU to
Operands
- to memory(data): second cycle (store instruction)
- to ALU to ALUout(reg)
ALUout to
- memory(address) to data(reg) (load instruction)
- memory address (store instruction)

Use of ALU

all instructions: PC++
conditional branch: PC + immediate
- R-type: operands to calculate result
- load/store: operand, immediate to calculate address
- conditional branch: operands to calculate zero

Add MUXes

Memory address: PC or ALUout
Register file write register: inst16-20 or inst11-15
ALUinpA: PC or operandA
ALUinpB:
- operandB (R-type or conditional branch: 3rd cycle)
- 4 (PC: 1st cycle)
- shifted immediate (PC: 2nd cycle)
- immediate(branch: 3rd cycle)
PC:
- ALU (PC++: 1st cycle)
- ALUout (branch: 4th cycle)

Control Signals

One-bit

Signal name	0	1	Comment	1	2	3R	3M	3B	4R	4M	5
RegDst	write to rt	write to rd	MUX2	X	X	X	X	X	1	X	0
RegWrite		write to register		X	X	X	X	X	1	X	1
ALUSrcA	PC	register A	MUX4	0	0	1	1	1
MemRead		read from memory		1						1
MemWrite		write to memory		X
MemToReg	data from ALU	data from memory	MUX3						0		1
IorD	address from PC	address from ALU	MUX1	0						1
IRWrite		latch instruction register		1
PCWrite		write PC		1
CondPCWrite		write PC if ALUout = 0						1

Two-bit


Signal	Value	Effect	1	2	3E	3M	3B	4	5
ALUOp	00	add	S	S	S	S
	01	subtract					S
	10	determine by funct
ALUSrcB	00	input from register B					S
	01	input is 4	S
	10	input is immediate field			S	S
	11	input is shifted immediate field		S
PCSource	00	PC from ALUout	S
	01	PC from ALUOut					S
	10	PC gets jump target from immediate

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