CS452 - Real-Time Programming - Fall 2011

Lecture 4 - Tasks

Pubilc Service Annoucements

1. Partners
2. Work off campus: IPAQ

The Hardware

Three suppliers

The hardware used in the course depends mainly on three suppliers

1. ARM: design firm that provides the architecture plus either wire-list or masks
2. Cirrus: chip manufacturer that integrates other elements with CPU to create the SoC, which contains
   • power supply and distribution
   • CPU
   • floating point co-processor
   • boot ROM
   • system control co-processor, also bought from ARM
   • interrupt controller, also bought from ARM
   • memory controllers
   • I/O facilities including
     • USB interface
     • UARTs
     • ethernet interface
     • general purpose digital I/O
3. Technologic: system manufacturer, who creates a circuit board, supplies memory (DRAM & flash RAM), puts connectors on a box, and puts the circuit board into the box.

TS-7200

`COM' ports

Connected to UARTs

• RS-232

Only really two

Ethernet port

IP number of the box is static, part of the configuration maintained in Flash memory.

Reset switch

Documentation says the switch is black, but on some boxes it's red.

Memory

Byte addressable, word size 32 bits

• 32 Mbytes of RAM, starting at 0x00000000
  • lowest RAM has code to access exception handlers
  • above that is RedBoot, which you do not want to overwrite
• 4 Mbytes of flash RAM, starting at 0x60000000
  • Contains RedBoot, which is loaded into RAM at startup

RedBoot

In Flash RAM

• located, loaded and started by boot loader in Flash
• boot loader started by boot ROM

EP-9302

System on chip

• ARM 920T core, implementing ARM v4T instruction set
• Two co-processors
  1. System controller, MMU
  2. Maverick Crunch floating point unit, mainly used for signal processing
• Peripherals
  1. UARTs
  2. Timers
  3. DIO
  4. A/D
  5. etc.

  Peripheral registers lie above 0x80000000

• Boot ROM
  • makes the processor sane, and
  • transfers control to boot loader in Flash

System busses

Advanced high-speed bus (AHB)

AHB connects

• ARM core
• memory controllers
• interrupt controllers
• USB controller
• ethernet MAC interface
• bridge to APB

Advanced peripheral bus (APB)

ARM 920T with v4 Instruction Set

Kernel of a Real-time Operating System

Microkernels

The real-time operating system we build consists of

1. an uninterruptible microkernel, plus
2. interruptible device-handling server tasks that run in user-space with permissions allowing them to access hardware.

What Does a Microkernel Provide?

Tasks

Program is conceived as a collection of co-operating tasks

• Tasks provide programs with modularity. Task structure as a method of program organization is discussed about the time you are finishing the OS.

What is a task?

1. A set of instructions
2. Current state, which is changed by executing instructions, which includes
   • values of its variables, which are automatic variables maintained on the stack. No global or static variables. (Global constants such as format strings for calls to printf, which the linker places in the text segment of the executable, are allowed.)
   • contents of its registers
   • other processor state such as the PSR
     • processor mode
     • condition codes
     • etc.
   • its run state and other things maintained by the kernel

Two tasks can use the same set of instructions, but

• every task has its own state
• Therefore, no static variables

The kernel keeps track of every task's state

• In essence, servicing a request amounts to changing the state of one or more tasks.
• Kernel maintains a task descriptor (TD) for each created task.
• That is, to create a task the kernel must allocate a TD and initialize it.

The TD normally contains

1. The task's stack pointer, which points to a private stack, in the memory of the task, containing
   • PC
   • other registers
   • local variables

   all ready to be reloaded whenever the task next runs.

2. Possibly the return value for when the task is next activated
3. The task's parent
4. The task's state
5. Links to queues on which the task is located
   • The kernel uses these to find the task when it is servicing a request

Possible states of the task

1. Active: running or about to run
   • On a single processor system only one task can ever be active.
   • But we would like to generalize smoothly to more than one processor.
2. Ready: can run if scheduled
   • Need a queue used by the scheduler when deciding which task should be the next active task
3. Blocked: waiting for something to happen
   • Need several queues, one for each thing that could happen

How tasks work together

• synchronization
• communication
• combined into one mechanism: message passing

Why are tasks important?

• Thinking about one thing at a time is easy.
  • Think about the options you expect to have after you graduate.
• Thinking about more than one thing at a time is hard.
  • Keep on thinking, and at the same time listen to me talking about tasks
  • Parenthetical remark. While walking you may have been talking to somebody, or thinking about something. You did both effortlessly. How?
• Thinking about more than one thing at a time, in real-time, is very hard
  • Think about turning the wheel, peddling and balancing while learning to ride a bicycle
  • How did you learn to coordinate all these activities in real-time?
• Tasks allow a programmer to produce each component of a activity into a sequential set of instructions that includes communication with other tasks..

Communication

Communication has two aspects

1. sharing information, requesting service
2. synchronization

We use Send/Receive/Reply (SRR) to do both.

1. Send blocks
2. Receive blocks: is synchronous with the call to send
3. Reply doesn't block: is synchronous with the return from send

Synchronization

1. Between tasks
   • Coordination of execution in co-operating tasks
   • Uses SRR
2. With internal events
   • Real-time by synchronizing with a real-time clock: e.g. clock server
   • Ordering execution: e.g. name server, bounded buffer
   • Uses SRR
3. With external events
   • interrupts

Interrupts

Input from the outside world

1. Provide the information you polled for
2. ISR OS design, which is essentially a jump table, which separates testing from acting

   interrupt entry point:
       calculate action_entry_point;
       jump to act_entry_point;
   entry_point1:
       action1;
   entry_point2:
       action2;
   ...
   entry_pointn:
       actionn;

   These are the same actions you implemented in your polling loop,

   • and the have all the same problems.
   • Somthing to think about
     • Polling loop was single-threaded
       • You were guaranteed not to be in the middle of a computation when you got the signal to start another one.
       • ISRs are not necessarily single-threaded
       • You could get back the polling loop by turning off interrupts during the action.
     • No hierarchy of importance among ISRs
       • Polling loop hierarchy was in the polling structure
       • Selective interrupt masking can reproduce the hierarchy,
       • But then you have to save state

Kernel Structure

The kernel is just a function like any other, but which runs forever.

kernel( ) {
  initialize( );  // includes starting the first user task
  FOREVER {
    request = getNextRequest( );
    handle( request );
  }
}

Where is the OS?

• requests come from running user tasks
  • in essence system calls

one type of request creates a task

There needs to be a first task that gets everything going

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