CS452 - Real-Time Programming - Spring 2011

Lecture 3 - Hardware, Flow Control

Pubilc Service Annoucements

1. Due date for assignment 0/1
2. `I can remember amusing myself once as an undergraduate, deleting and creating files till I got the right inode numbers to allow a judicious choice of binary file names to result in a directory that was a valid executable a.out image,' says Digby Tarvin. Anybody interested in trying this for elf?
3. Copying code.
4. Screens in the laptop area
5. Thin clients in the trains lab.
6. Stack: where is it?
7. Apple rumour

The Hardware

TS-7200

`COM' ports

Connected to UARTs

• RS-232

Only really two

Ethernet port

IP number of the box is static, part of the configuration maintained in Flash memory.

Reset switch

Documentation says the switch is black, but on some boxes it's red.

EP-9302

System on chip

• ARM 920T core, implementing ARM v4T instruction set
• Two co-processors
  1. System controller, MMU
  2. Maverick Crunch floating point unit, mainly used for signal processing
• Peripherals
  1. UARTs
  2. Timers
  3. DIO
  4. A/D
  5. etc.

Memory

Byte addressable, word size 32 bits

• 32 Mbytes of RAM, starting at 0x00000000
  • lowest RAM has code to access exception handlers
  • above that is RedBoot, which you do not want to overwrite
• 4 Mbytes of flash RAM, starting at 0x60000000
  • Contains RedBoot, which is loaded into RAM at startup
• Device registers above 0x80000000

Separate instruction and data caches

• Not turned on for RedBoot

The Software

Compiler

GNU tool chain

• when you are getting started optimizing is a bad idea
• software multiplication, division, floating point from libgcc.a
• Makefile
• target.ld

RedBoot

Partial implementation

• fconfig :: NOT
• load (tftp)
• examine, copy, fill memory

Returns when program terminates

Busy-wait IO

COM2 uses monitor; COM1 goes to train

1. initialization/configuration
2. output
3. input

For assignment 0 you need to increase the functionality.

Bug in one function

How Timers Work

Set them up

• how far to count, which is the length of the counting cycle
• calculate from their own clock speed and the tick rate you want

Start them counting

• once started they count forever

Whenever they count through zero they trigger an interrupt.

• You have interrupts turned off, but
• You could enable interrupts in the timer and look for a bit set in the ICU

A better solution for this assignment

• Let the timer count continuously and test for roll-over

Read the documentation carefully.

Data Communication using RS-232

Communication protocol existing since forever.

• description of a wire, and the signals on it.

Configuring RS-232

If you looked at the voltage on a transmit or receive wire doing RS-232 you would see, in order,

1. start bits for synchronization (1 or 2)
2. data bits (6, 7 or 8)
3. possibly a parity bit
4. stop bits

all coming at a specific rate, measured in bits per second. So you need to configure

1. transmit/receive speed
2. how many start bits
3. how many data bits
4. whether or not there's a parity bit, and whether the parity is even or odd
5. how many stop bits

and the configuration must match the other end or communication is impossible.

Errors

Most UARTs have an error register that you can read, which has bits for different types of errors

1. OVERRUN: you have missed a byte
   • by not reading fast enough on input
   • by writing too fast on output
2. FRAMING: the UART did not get valid start and stop bits
   • usually a configuration error
3. PARITY: obvious
4. BREAK: implementation-dependent

Very simple RS-232

Three wires

• ground
• transmit
• receive

Wired like this

GND ---------- GND

XMIT --\ /---- XMIT
        X
RCV----/ \---- RCV

Flow Control in RS-232

Three wire works fine as long as both ends of the wire are much faster than the wire itself. But the train controller is very slow. Why?

• Wait for mechanical sensors.
• High electrical noise

The train controller needs to be able to say STOP, I can't take any more

• How is this done?

Software Flow Control

XOFF, XON

Hardware Flow Control

CTS, RTS or DTR, DSR

• The train interface uses CTS/RTS
• Wired like this

  CTS----\ /-----CTS
          X
  RTS----/ \-----RTS

• You negate CTS when you can't handle more input
• You read RTS to find out if it is safe to send more output

What Happens if You Omit Flow Control

• Bytes get dropped
• Bytes get corrupted
• The train controller hangs

What Students are Doing Wrong

Most students who have talked to me have a polling loop that loops something like this

while ( 1 )
    read timer
    if ( timer has counted enough )
       rewrite the time using bw... to terminal;
    if ( terminal READY bit set )
       read byte
       if ( byte == EOL )
           parse command in buffer
           execute command // including bw... to train and bw... to terminal
       else
           accumulate byte in buffer;
    if ( train READY bit set )
        read byte
        accumulate byte in buffer
        if ( buffer has complete command )
           parse command in buffer
           execute command // including bw... to train and bw... to terminal

This code operates correctly some of the time, but not all the time. To see why,

1. construct a worst case, asking yourself how often each of the events might occur;
2. calculate the worst case time for all actions to execute, including the waiting

Obviously, the polling loop needs to be quite a bit more complex.

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